The Bus arc of the Schematics technology is a special arc that can carry multiple signals (see Section 7-5-1). When giving a network name to Bus arcs, it is possible to specify complex bus names.

- Lists Bus names can be lists (for example, "clock,in1,out" which aggregates 3 signals into a 3-wide bus) .
- Simple arrays Bus names can be arrays (for example, "A[0:7]" which defines an 8-wide bus).
- Array index lists and ranges Arrayed bus names can have lists of values (separated by commas) or ranges of values (using the colon). For example, the bus "b[0],c[3,5],d[1:2],e[8:6]" is an 8-wide bus with signals in this order: b[0], c[3], c[5], d[1], d[2], e[8], e[7], e[6].
- Multidimensional array indices Arrays can be multiply indexed (for example "b[1:2][100,102]" defines a bus with 4 entries: b[1][100], b[1][102], b[2][100], and b[2][102]). You can have any number of dimensions in an array.
- Symbolic array indices It is possible to use symbolic indices in bus naming (for example, the bus "r[x,y]" defines a 2-wide bus with the signals r[x] and r[y]).

When a bus is unnamed, the system determines its width from the ports that it connects. Some tools (such as simulation netlisters) need to name everything, and so use automatically-generated names. When this happens, the system must choose whether to number the bus ascending or descending. To resolve this issue, use the "Network" preferences (in menu File / Preferences..., "Tools" section, "Network" tab), and choose "Ascending" or "Descending".

Individual wires that connect to a bus must be named with names from that bus. As an aid in obtaining individual signals from a bus, the Rip Bus command (in menu Edit / Arc) will automatically create such wires for the selected bus arc.

Besides using array names on busses, you can also give array names to schematic nodes. Netlisters will create multiple copies of that node, named with the individual elements of the array.